A prior art binary code generator creates cyclical chipping sequences from a binary shift register with fixed feedback taps. A specific length shift register generates codes that are cyclical with fixed autocorrelation and cross-correlation parameters and fixed broadband power spectral density characteristics. This results in an unchangeable broadband power spectral density profile fixed by code chipping rates. These codes support low data-rate-to-bandwidth ratios resulting in inefficiencies in communications spectrum usage and fixed power spectral density profiles.
A common prior art binary code generator used in signal processing is a pseudorandom noise code generator of chipping sequences. These codes require binary feedback shift registers to create chipping streams used to phase modulate carrier frequencies parallel to lower-rate data modulation schemes resulting in spread spectrum transmit bandwidths much greater than the data bit rate transmitted.
The prior art receiver local shift register code generator produces a local chipping stream replica of the transmitted code. This local replica is precisely delayed from universal time consistent with communications range delays. Controlled delayed versions of the local synchronized chipping patterns are produced from a plethora of delay mechanisms and to sense autocorrelation peaks, acquire, and track received spread spectrum codes. In turn, the autocorrelation process collapses the spread spectrum bandwidth to a lower data symbol bandwidth, and data synchronization and extraction is completed.
The shift register code generator has a cyclical repeat length that constrains the unique autocorrelation chip length usable in the receiver de-spreading processes. This repeating cycle length is a basic characteristic when a binary feedback shift register is used. An N-length shift register is the source of a pseudorandom noise code order N. This shift register has a limited length of non-repeating chip patterns defined by the expression: L=(2^N)−1, where L is the repeating pattern chip count and N is the shift register length. This creates a cyclical repeating code that is unusable for communications non-redundant ranging or communication signal synchronization constrained to a range inside an L chips limit. A longer shift register code is required to resolve this range redundancy and achieve high autocorrelation gains while still providing a short time to acquisition. Two transmissions and codes are required to efficiently complete the acquisition and tracking over a long range uncertainty of the connection. The code power spectral density profile is fixed for every prior art code chipping rate that creates a one-sided null at the carrier offset equal to the code chipping rate in hertz. This is a constraint common to all binary feedback shift register code generators, creating a fixed profile of the transmitted power spectral density for all codes. This power spectral density includes significant side lobes at each multiple of the chipping rate, creating near-carrier interfering power levels for nearby receiver channels. Additionally, a separate family of data symbol demodulation processes is required for baseband digital data that degrades the prior art code tracking process, reducing data throughput capability, and spectrum efficiency.
Prior signal processing methods also use complex pulse shaping and combined amplitude and phase shift processes to define data symbols to increase spectrum efficiency at the expense of range-rate tracking performance, complexity, and cost. Recent new modulation methods, such as code shift keying, do increase spectrum efficiency, but require large numbers of orthogonal binary codes with near-ideal cross-correlation parameters. Large numbers of such orthogonal codes are not possible using prior art shift register codes. The shift register cyclical codes of today are complex and have only a small numbers of ideal codes that have the acceptable cross-correlation characteristics for code division multiplexing or code shift keying modulation methods. The cyclical code generator configurations are very selective and complex with a small range of versatility. The power spectrum is always governed by the spectrum of a pseudorandom noise code and its chipping rate. The result is spectrum usage inefficiencies and side lobes that require complex transmit and receive filtering processes and large separations of carrier frequencies.
In view of the limitations in the prior state-of-the-art shift register code generators, it would be advantageous to have a binary spread spectrum code generator that produces a non-repeating chipping sequence over a long epoch of code. It would also be advantageous to have a code configuration capability of tailoring binary code pulse width probability distributions to create varied power spectral densities and bandwidths without changing code chipping rates. Finally, it would be advantageous to have non-cyclical code characteristics that allow both short autocorrelation periods and long autocorrelation periods to be processed concurrently using one binary orthogonal code in a long epoch. These advantages would result in many options for both code division multiplexing and code shift key modulation choices would enable high spectrum data throughput efficiency and low hardware complexity.